System Bus

美 [ˈsɪstəm bʌs]英 [ˈsɪstəm bʌs]
  • 网络系统总线;汇流排;系统汇流排;内总线
System BusSystem Bus
  1. Construction and Analysis of System Bus in the Microcomputer

    微型计算机系统总线的结构与分析

  2. System Bus Technique and Its Development

    系统总线技术及其发展

  3. Compared with several data acquisition system bus peculiarity and its applications

    几种常用测试系统总线的特点及应用

  4. This paper analyzes several kinds technology of measure-control system bus .

    比较分析了当前主要几种测控系统总线技术。

  5. Parallel single-bus architecture is adopted in internal system bus design .

    内部系统总线采用并行单总线结构;

  6. The Analysis and Actuality of Measure-control System Bus Technology

    测控系统总线技术的现状与分析

  7. Information processing & Processor system bus interface ( Eurobus A )

    GB/T14241-1993信息处理处理机系统总线接口(欧洲总线A)

  8. There will be a persistent system bus , which is started at boot time .

    将有一个持久的系统总线(systembus),它在引导时就会启动。

  9. The digital power system bus is the basis of data integrated platform of digital power system and Business platform of digital power system .

    数字电力系统总线是数字电力系统数据整合平台和业务基础平台的基础。

  10. The SOC design and implementation of the spacecraft system bus was studied , for example of the 1553B bus controller .

    以1553B总线控制器为例,采用SOC设计方法,研究了航天器系统总线的设计和实现。

  11. EISA System Bus and VESA Local Bus

    EISA系统总经与VESA局部总线

  12. The SCA System Bus is used by the SCA runtime for asynchronous communication between SCA components and SCA modules .

    SCA系统总线由SCA运行时用于与SCA组件和SCA模块之间的异步通信。

  13. Collecting channels stored the collected data into their respective caches , which were disposed by CPU through system bus .

    各采集通道把采集数据存入各自缓存,由CPU通过系统总线处理。

  14. The research and practice of this dissertation complete the design of a bus bridge module which between the on-chip system bus and the peripheral bus .

    本论文的研究与实践工作完成了一个片上系统总线和外设总线之间的总线桥模块设计。

  15. This pauses the pauses the boot process for five seconds , waiting for slow devices to register with the system bus .

    这暂停暂停五秒钟启动过程中,等待缓慢的设备登记系统总线。

  16. The system bus connects the CPU with the main memory and is separate from the buses connecting the CPU with the system 's hardware peripherals .

    系统总线将CPU与主存连接在一起并且和连接CPU与系统硬件外设的总线隔离开。

  17. The difficulty and the method of implement pluggable technology will be introduced including the safety of laser , the surge current of plug and the safety of system bus .

    介绍小封装光模块进行热插拔的技术难点及其解决方法和具体实现,主要包括热插拔时激光器的安全、热插拔时浪涌电流的抑制以及热插拔对系统总线干扰等问题。

  18. For marine system bus for network communication , this paper proposes multi-bus the premise of the communication monitoring and information exchange programs under without increasing the hardware realization of switching equipment .

    针对船用网络通讯系统总线,本文提出了多总线在不需增加硬件转换设备的前提下实现监控与信息交换的通讯方案。

  19. Of course , if an application wants to receive messages from the system bus , it can connect to it as well & but the messages it can send will be restricted .

    当然,如果一个应用程序需要接收来自系统总线的消息,它不如直接连接到系统总线&不过,它可以发送的消息将是受限的。

  20. This controller took the form of two-level structure , i.e. the system bus and I / O bus was designed separately and the whole controller had two parts : CAN node control module and I / O module .

    该CAN总线控制器采用二级总线的结构形式,即系统总线和I/O总线分离,将其分为CAN节点控制模块和I/O模块两个相互独立的部分,通过485总线进行数据通讯。

  21. When WebSphere JDBC Adapter delivers events to the queue in the SCA system bus , it is possible that events fail to be delivered to the recipient of events due to unexpected factors .

    当WebSphereJDBCAdapter向SCA系统总线中的队列交付事件时,由于意外因素而可能无法将事件交付给事件接收者。

  22. Comparative analysis of common industrial network monitoring of the present situation , the established Internet and CAN-based embedded system bus on the UPS power supply for network monitoring , based on the Linux operating system to complete the monitoring system development .

    通过对比和分析工业监控网络的现状之后,确定采用基于Internet和CAN总线的嵌入式系统对UPS电源进行网络监控,完成了基于Linux操作系统的监控系统开发。

  23. The digital receiver employing FPGA as the main control chip , DDR2 SDRAM as buffers , CPCI bus as system bus , can complete dual radar signal high speed acquisition , down-conversion processing , real-time storage and transmission .

    该数字接收机采用FPGA作为主控芯片,采用DDR2SDRAM作为缓存,采用CPCI总线作为传输总线,能够完成双路雷达信号的高速采集、下变频处理、缓存、传输等功能。

  24. Construction on the Technological Process System of Bus Position Rhythm Production

    客车定位节拍生产工艺流程体系的构建

  25. Design of the inner control system in bus management with IC card

    IC卡车辆内部控制系统的设计

  26. Design of the name display system for bus station

    公交车站名显示系统设计

  27. Data Processing and Analyzing System for Bus IC Card Based on GIS

    基于GIS的公交IC卡数据处理及分析系统

  28. The study of a energy - conserving system for bus

    城市公交汽车的节能系统研究

  29. Dynamic Microcontroller Management System on Bus with Infrared Coding Method

    红外编码式公交车辆动态微机管理系统的应用

  30. Studying the concurrent design system of bus based in PDM

    基于PDM的客车并行设计系统研究